Vojtech Mrazek

Efficient On-Chip Randomness Testing Utilizing Machine Learning Techniques
Vojtech Mrazek and Marek Sys a Petr Svenda,
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2019.
Keywords: fpga, genetic-algorithms, randomness, distinguishers, DOI website, BibTeX

@InProceedings{2019-ieeevsli-mrazek,
  title = {Efficient On-Chip Randomness Testing Utilizing Machine Learning Techniques},
  author = {Vojtech Mrazek and Marek Sys a Petr Svenda},
  booktitle = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  publisher = {IEEE},
  year = {2019},
  issn = {1557-9999},
  doi = {10.1109/TVLSI.2019.2923848},
  keywords = {FPGA, genetic-algorithms, randomness, distinguishers},
}

Evolving Boolean Functions for Fast and Efficient Randomness Testing
Vojtech Mrazek, Marek Sys, Zdenek Vasicek, Lukas Sekanina and Vaclav Matyas,
Proceedings of the Genetic and Evolutionary Computation Conference (GECCO '18), Association for Computing Machinery, 2018, 1302–1309.
DOI website, BibTeX

@InProceedings{2018-gecco-mrazek,
  title = {Evolving Boolean Functions for Fast and Efficient Randomness Testing},
  author = {Vojtech Mrazek and Marek Sys and Zdenek Vasicek and Lukas Sekanina and Vaclav Matyas},
  booktitle = {Proceedings of the Genetic and Evolutionary Computation Conference (GECCO '18)},
  pages = {1302--1309},
  publisher = {Association for Computing Machinery},
  location = {Kyoto, JP},
  year = {2018},
  isbn = {978-1-4503-5618-3},
  doi = {10.1145/3205455.3205518},
}