• Efficient On-Chip Randomness Testing Utilizing Machine Learning Techniques
    Vojtech Mrazek, Marek Sys and Petr Svenda,
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2019.
    Keywords: fpga, genetic-algorithms, randomness, distinguishers, DOI website, BibTeX
    @InProceedings{2019-ieeevsli-mrazek,
      title = {Efficient On-Chip Randomness Testing Utilizing Machine Learning Techniques},
      author = {Vojtech Mrazek and Marek Sys and Petr Svenda},
      booktitle = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
      publisher = {IEEE},
      year = {2019},
      issn = {1557-9999},
      doi = {10.1109/TVLSI.2019.2923848},
      keywords = {FPGA, genetic-algorithms, randomness, distinguishers},
    }